Integrated circuit charge pump circuits are widely used to provide boosted voltages in integrated circuits. These boosted voltages may be used, for example, to erase and program flash Electrically Erasable and Programmable Read Only Memories (flash EEPROMs).
There is a continuing trend toward lowering the power consumption in portable computers. Accordingly, the integrated circuits in personal computers are being designed to run at lower voltage levels, such as 5V, 3.3V or less. Unfortunately, some desirable features in portable computers may require higher voltages. For example, flash EEPROM has been used to store Basic Input/Output Startup (BIOS) programming for the personal computer. This flash EEPROM may be erased and reprogrammed without being removed from the computer by running a small update program when the BIOS program is to be changed. However, erasing and programming flash EEPROM generally requires up to 10V or more, which is generally not available from the lower voltage batteries that are provided in portable computers. Accordingly, a charge pump circuit may be used to produce the higher voltage from the lower voltage source. Charge pump circuits may also be used for other applications in integrated circuit memory devices and other integrated circuit devices.
A conventional charge pump circuit is disclosed in a publication entitled "On-Chip High-Voltage Generation in NMOS Integrated Circuit Using Improved Voltage Multiplier Technique" by Dickson, IEEE Journal of Solid-State Circuits, Vol. SC-11, No. 3, June 1976, pp. 374-378. FIG. 1 is a circuit diagram of charge pump circuits as disclosed in Dickson.
As shown in FIG. 1, the integrated circuit charge pump circuit boosts a first voltage from a voltage source Vcc to a second voltage Vpp at an output terminal T1. The charge pump circuit includes a plurality of pumping units that are serially connected between the voltage source and the output terminal. Each of the pumping units includes a coupling capacitor C1-Cn, and a switching NMOS enhancement transistor MN1-MNn. A precharging transistor MNO connects the first voltage Vcc at terminal T2 to the pumping units. The drain region of each pumping transistor is electrically connected to its gate, and is also electrically connected to the source region of an immediately succeeding pumping unit. The bulk regions of the transistors MN1-MNn are held at ground.
As shown in FIG. 2, the pumping units are alternatively activated in response to pumping clocks P1 and P2, having complementary phases. Thus, P1 is applied to the odd-numbered capacitors C1, C3 . . . , and P2 is applied to the even-numbered capacitors C2, C4 . . . . Thus, initially, node N1 is charged to Vcc-Vth, where Vth is the threshold voltage of MN0. In response to the rising and falling of P1 and P2, voltage levels from N2 to T1 are stepwise increased to reach a level of Vpp.
Unfortunately, during the pumping operation, the voltage between the source and bulk region of each transistor, VSB, may gradually increase so that the source voltage rises while the bulk region is maintained at ground. This effect is often referred to as the "body" effect. As shown in FIG. 3, the source-to-bulk voltage VSB may increase from about 0V to about 3V, which may shift the gate voltage Vgs from 0.8V to 1.3V, for 0 drain-to-source current Ids. Threshold voltage Vt may thereby increase as shown in FIG. 3 in proportion to VSB. The shift in threshold voltage may degrade the efficiency of the charge pump circuit. Accordingly, a sufficiently high voltage for erasing and programming may not be obtained.